Time Sensitive Networking (TSN) offers an IEEE standard communication technology that enables interoperability between standard-conformant industrial devices from any vendor. It also eliminates the need for physical separation of critical and non-critical communication networks, which allows a direct exchange of data between operation centers and companies, a concept at the heart of the Industrial Internet of Things (IIoT).
End-to-end TSN Network
This article describes creating an end-to-end TSN network using specialized PCI Express (PCIe) cards and two final Linux endpoints. For this purpose, the two primary standards of TSN, IEEE 802.1AS (regarding clock synchronization), and IEEE 802.1Qbv (regarding time scheduled traffic) have been implemented in Linux equipment as well as a configuration and monitoring system.
IEEE 802.1AS Implementation
For implementing the 802.1AS Timing and Synchronization for TSN standard, the network clocks must be identified. It is necessary to distinguish between the way to synchronize all the clocks. There are two types of clocks:
- Network Synchronization.
- Device Network Synchronization.
The network synchronization is based on synchronizing the four PTP hardware clocks (PHC) of the I210 and the PCIe, where linuxptp package is used, an implementation of PTP for Linux, which also implements Boundary Clock (BC) and Ordinary Clock (OC).
On the other hand, the system clock, which is software, gets its time form the Internet using NTP or GPS for the device-network synchronization.
IEEE 802.1Qbv Implementation
With IEEE 802.1Qbv, packet transmission is scheduled end-to-end in a repeating cycle. Qbv allows packets’ deterministic arrival, giving latency guarantees, extremely low jitter, and no packet loss. Three basic types of traffic are defined in TSN:
- ST: is appropriate for critical messages with strict real-time requirements.
- Best-Effort traffic (BE): is general Ethernet traffic that does not require any QoS.
- Reserved Traffic (RT) is for frames that need to reserve specific bandwidth and have soft real-time requirements.
A Time-Aware Shaper (TAS), defined in IEEE 802.1Qbv, is a gate that enables or disables the frame transmission depending on the scheduling algorithm. TAS divides Ethernet communications into fixed-length, continuously repeating cycles. These cycles are divided into time slots, and in each time slot, one or more of the eight priorities are assigned.